| Issue Date | Title | Author(s) | Relation | scopus | WOS | Fulltext/Archive link |
|---|---|---|---|---|---|---|
| 2010 | An Analytical Model to Exploit Memory Task Scheduling | Hsiang-Yun Cheng; Jian Li; Chia-Lin Yang | ||||
| 2010 | Memory Latency Reduction via Thread Throttling | Hsiang-Yun Cheng; Chung-Hsiang Lin; Jian Li; Chia-Lin Yang |
