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Browsing by Author Matt Poremba


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0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Showing results 1 to 3 of 3
Issue DateTitleAuthor(s)RelationscopusWOSFulltext/Archive link
2015EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip MultiprocessorsHsiang-Yun Cheng; Matt Poremba; Narges Shahidi; Ivan Stalev; Mary Jane Irwin; Mahumut Kandemir; Jack Sampson; Yuan XieACM Transactions on Architecture and Code Optimization 12(2),17:1-17:22
2014EECache: Exploiting Design Choices in Energy-Efficient Last-Level Caches for Chip MultiprocessorsHsiang-Yun Cheng; Matt Poremba; Narges Shahidi; Ivan Stalev; Mary Jane Irwin; Mahumut Kandemir; Jack Sampson; Yuan Xie
2015Energy-Efficient Inclusion Properties for STT-RAM Last-Level CachesHsiang-Yun Cheng; Matt Poremba; Ivan Stalev; Yuan Xie; Jack Sampson; Mary Jane IrwinNon-Volatile Memories Workshop (NVMW), 1-2
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